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Workshop: MCHPC’18: Workshop on Memory Centric High Performance Computing
Event TypeWorkshop
Registration Categories
W
Tags
Memory
NVRAM
Parallel Programming Languages, Libraries, and Models
TimeSunday, November 11th9am - 5:30pm
LocationD170
Presentations
9:00am - 9:02amIntroduction - MCHPC’18: Workshop on Memory Centric High Performance Computing
9:02am - 10:00amMCHPC'18 Morning Keynote: Converging Storage and Memory
Presenter
10:00am - 10:30amWorkshop Morning Break
10:30am - 10:52amChallenges of High-Capacity DRAM Stacks and Potential Directions
10:52am - 11:14amEvaluation of Intel Memory Drive Technology Performance for Scientific Applications
11:14am - 11:30amxBGAS: Toward a RISC-V ISA Extension for Global, Scalable, Shared Memory
11:30am - 11:52amUnderstanding Application Recomputability without Crash Consistency in Non-Volatile Memory
Author/Presenters
11:52am - 12:14pmA Preliminary Study of Compiler Transformations for Graph Applications on the Emu System
12:14pm - 12:30pmData Placement Optimization in GPU Memory Hierarchy Using Predictive Modeling
12:30pm - 2:00pmWorkshop Lunch (on your own)
2:00pm - 3:00pmMCHPC'18 Afternoon Keynote: All Tomorrow’s Memory Systems
Presenter
3:00pm - 3:30pmWorkshop Afternoon Break
3:30pm - 3:52pmOn the Applicability of PEBS-Based Online Memory Access Tracking for Heterogeneous Memory Management at Scale
3:52pm - 4:14pmExploring Allocation Policies in Disaggregated Non-Volatile Memories
4:14pm - 4:30pmHeterogeneous Memory and Arena-Based Heap Allocation
4:30pm - 5:30pmMCHPC'18 Panel: Research Challenges in Memory-Centric Computing
Presenter
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