Presentation
Siena: Exploring the Design Space of Heterogeneous Memory Systems
SessionNon-Volatile Memory
Authors
Event Type
Paper
TP
GPUs
Memory
NVRAM
Performance
System Software
Tools
TimeWednesday, November 14th11:30am - 12pm
LocationC141/143/149
DescriptionMemory systems are crucial to the performance, power, and cost of high-performance computing systems. Recently, multiple factors are driving the need for more complex, deep memory hierarchies. However, architects and customers are struggling to design memory systems that effectively balance multiple, often competing, factors in this large, multidimensional, and fast-moving design space. In this paper, we systematically explore the organization of heterogeneous memory systems on a framework, called Siena. Siena facilitates quick exploration of memory architectures with flexible configurations of memory systems and realistic memory workloads. We perform a design space exploration on 22 proposed memory systems using eight relevant workloads. Our results show that horizontal organizations of memories can achieve higher performance than that of vertical organizations when the distribution of memory traffic balances the performance gap between memories. However, the coupling effects through shared resources and application behaviors could negate the advantage of high-performance memory in horizontal organizations.
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