Presentation
CCIX: Seamless Data Movement for Accelerated Applications
SessionHPC Workflow
Presenter
Event Type
Exhibitor Forum
Data Management
Workflows
TimeTuesday, November 13th4:30pm - 5pm
LocationD171
DescriptionCCIX or Cache Coherent Interface for Accelerators is a chip-to-chip interconnect architecture specification created to solve the performance and efficiency challenges of emerging acceleration applications such as machine learning, network processing, storage/memory expansion, and analytics that combine processing and acceleration.
The CCIX Consortium has released the production revision of the CCIX Base Specification 1.0 that enables seamless data sharing in heterogeneous compute systems between CPUs, Accelerators and Memory expansion devices. The CCIX specification leverages the PCI Express™ 4.0 architecture and ecosystem while increasing the throughput to 25GT/s per lane.
In this Exhibitor Forum, CCIX Consortium members will discuss the advancements CCIX brings to the system hardware and software architecture, and the use cases that benefit from the cache coherent shared virtual memory paradigm and driverless data movement between processors and accelerators including FPGAs, GPUs, network/storage adapters, intelligent networks and custom ASICs.
The CCIX Consortium has released the production revision of the CCIX Base Specification 1.0 that enables seamless data sharing in heterogeneous compute systems between CPUs, Accelerators and Memory expansion devices. The CCIX specification leverages the PCI Express™ 4.0 architecture and ecosystem while increasing the throughput to 25GT/s per lane.
In this Exhibitor Forum, CCIX Consortium members will discuss the advancements CCIX brings to the system hardware and software architecture, and the use cases that benefit from the cache coherent shared virtual memory paradigm and driverless data movement between processors and accelerators including FPGAs, GPUs, network/storage adapters, intelligent networks and custom ASICs.
