<span class="var-sub_title">xBGAS: Toward a RISC-V ISA Extension for Global, Scalable, Shared Memory</span> SC18 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

MCHPC’18: Workshop on Memory Centric High Performance Computing


xBGAS: Toward a RISC-V ISA Extension for Global, Scalable, Shared Memory

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Abstract: Given the switch from monolithic architectures to integrated systems of commodity components, scalable high performance computing architectures often suffer from unwanted latencies when operations depart an individual device domain. Transferring control and/or data across loosely coupled commodity devices implies a certain degree of cooperating in the form of complex system software. The end result being a total system architecture the operates with low degrees of efficiency.

This work presents initial research into creating micro architecture extensions to the RISC-V instruction set that provide tightly coupled support for common high performance computing operations. This xBGAS micro architecture extension provides applications the ability to access globally shared memory blocks directly from rudimentary instructions. The end result is a highly efficient micro architecture for scalable shared memory programming environments.


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