Authors: John Davis (Bigstream Networks)
Abstract: Massive amounts of data are being consumed and processed to drive business. The exponential increase in data has not been matched by the computational power of processors. This has led to the rise of accelerators. However, big data algorithms for ETL, ML, AI, and DL are evolving rapidly and/or have significant diversity. These moving targets are poor candidates for ASICs, but match the capabilities and flexibility of FPGAs. Furthermore, FPGAs provide a platform to move computation to the data, away from the CPU, by providing computation at line rate at the network and/or storage. Bigstream is bridging the gap between high-level big data frameworks and accelerators using our Hyper-acceleration Layer built on top of SDAccel. In this talk, we will describe the Bigstream Hyper-acceleration that automatically provides computational acceleration, by the CPU, storage, or network, for big data platforms with zero code change.
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