<span class="var-sub_title">Versal: The New Xilinx Adaptive Compute Acceleration Platforms (ACAP)</span> SC18 Proceedings

The International Conference for High Performance Computing, Networking, Storage, and Analysis

IA^3 2018: 8th Workshop on Irregular Applications: Architectures and Algorithms


Versal: The New Xilinx Adaptive Compute Acceleration Platforms (ACAP)

Authors: Kees Vissers (Xilinx Inc)

Abstract: In this presentation, I will present the new Adaptive Compute Acceleration Platform. I will show the overall system architecture of the family of devices including the Arm cores (scalar engines), the programmable logic (Adaptable Engines) and the new vector processor cores (AI engines). I will focus on the new AI engines in more detail and show the concepts for the programming environment, the architecture, the integration in the total device, and some application domains, including Machine Learning and 5G wireless applications. I will illustrate the initial design rationale and the architecture trade-offs. These platforms extend the concept of tuning the memory hierarchy to the problem.




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