Yasumoto Tomita, is a research manager at Fujitsu laboratories LTD. He received his B.S., M.S. and Ph.D degrees in electrical engineering from Keio University, Yokohama, Japan in 2002, 2004 and 2007 respectively. After he joined Fujitsu Laboratories, Ltd., in 2007, he has been engaged in research and design of high-speed I/O with CMOS. Dr. Tomita served as a TPC member for ASSCC and VLSI Symposium on Circuits.