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Poster
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Compiling SIMT Programs on Multi- and Many-Core Processors with Wide Vector Units: A Case Study with CUDA
Event Type
Poster
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TP
EX
TimeThursday, November 15th8:30am - 5pm
DescriptionThere has been an increasing interest in SIMT programming tools for multi- and manycore (co)processors with wide vector extensions. In this work, we study the effective implementation of a SIMT programming model (a subset of CUDA C) on Intel platforms with 512-bit vector extensions (hybrid MIMD/SIMD architectures). We first propose a set of compiler techniques to transform programs written using a SIMT programming model into code that leverages both the x86 cores and the vector units of a hybrid MIMD/SIMD architecture, thus providing programmability, high system utilization and portability. We then evaluate the proposed techniques on various hybrid systems using microbenchmarks and real-world applications. Finally, we point out the main challenges in supporting the SIMT model on hybrid systems.
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