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Workshop
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MCHPC'18 Morning Keynote: Converging Storage and Memory
Presenter
Event Type
Workshop
Registration Categories
W
Tags
Memory
NVRAM
Parallel Programming Languages, Libraries, and Models
TimeSunday, November 11th9:02am - 10am
LocationD170
DescriptionOrder of magnitude advances in non-volatile memory density and performance are upon us bringing significant systems level architecture opportunities. The NAND Memory transition to 3D and the introduction of QLC have recently increased NAND SSD storage density at a very rapid pace. Products featuring one terabit per die are available from Intel® Corporation allowing dense storage, for example one PByte in 1U. This large improvement in density brings great value to systems, but also increases the performance/capacity/cost gap between DRAM and storage within the long evolving memory and storage hierarchy. Intel® 3D XPoint™ Memory, with much higher performance than NAND and greater density than DRAM has entered the platform to address this gap - first as SSDs. These Intel® Optane™ SSDs are in use within client and data center platforms as both fast storage volumes and as paged extensions to system memory delivering significant application performance improvements. With low latency and fine grained addressability, this new memory can be accessed as Persistent Memory (PM), avoiding the 4kByte block size and multiple microsecond storage stack that accompany system storage. This Intel® Optane Data Center Persistent Memory is made possible through a series of hardware and software advances. The resulting high capacity, high performance, persistent memory creates opportunities for rethinking algorithms to deliver much higher performance applications. This presentation will explain these new memory technologies, explore their impact on the computing system at the architecture and solution level, and suggest areas of platform exploration relevant to the HPC community.
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