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Paper
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FlipTracker: Understanding Natural Error Resilience in HPC Applications
SessionResilience
Event Type
Paper
Registration Categories
TP
Tags
GPUs
Resiliency
State of the Practice
System Software
TimeTuesday, November 13th11am - 11:30am
LocationC141/143/149
DescriptionAs high-performance computing systems scale in size and computational power, the danger of silent errors, i.e., errors that can bypass hardware detection mechanisms and impact application state, grows dramatically. Consequently, applications running on HPC systems need to exhibit resilience to such errors. Previous work has found that, for certain codes, this resilience can come for free, i.e., some applications are naturally resilient, but few works have shown the code patterns—combinations or sequences of computations—that make an application naturally resilient. In this paper, we present FlipTracker, a framework designed to extract these patterns using fine-grained tracking of error propagation and resilience properties, and we use it to present a set of computation patterns that are responsible for making representative HPC applications naturally resilient to errors. This not only enables a deeper understanding of resilience properties of these codes, but also can guide future application designs toward patterns with natural resilience.
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