Accelerate Machine Learning with High Performance Memory
TimeWednesday, November 14th11:30am - 12pm
DescriptionMachine learning is driving the next industrial revolution, through the use of easy to program accelerator boards, you can be in the driver seat. In this talk, Micron will discuss a new novel inference engine architecture that provides the benefits of hardware acceleration, that supports a wide range of ML frameworks and networks; and is software programmable. This new architecture/platform is a flexible and programmable neural network accelerator co-processor is designed for 1) maximum hardware utilization, 2) efficient memory bandwidth usage, 3) ultra-low power operation. This architecture coupled with a ML complier allows the user to take advantage of hardware acceleration while maintaining software programmability.