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DTSTART:19700308T020000
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DTSTAMP:20181221T160743Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181114T083000
DTEND;TZID=America/Chicago:20181114T170000
UID:submissions.supercomputing.org_SC18_sess342_drs124@linklings.com
SUMMARY:High Performance Middlewares for Next Generation Architectures: Ch
 allenges and Solutions
DESCRIPTION:Doctoral Showcase\nWorkshop Reg Pass, Tutorial Reg Pass, Tech 
 Program Reg Pass, Exhibits Reg Pass, Exhibits - Exhibit Hall Only Reg Pass
 \n\nHigh Performance Middlewares for Next Generation Architectures: Challe
 nges and Solutions\n\nChakraborty, Panda\n\nThe emergence of modern multi-
 /many-core architectures and high-performance interconnects have fueled th
 e growth of large-scale supercomputing clusters. Due to this unprecedented
  growth in scale and compute density, high performance computing (HPC) mid
 dlewares now face a plethora of new challenges to solve in order to extrac
 t the best performance from such systems. In this work, we study four such
  challenges - a) launching and bootstrapping jobs on very large scale clus
 ters, b) contention in collective communication, c) point-to-point communi
 cation protocols, and d) scalable fault-tolerance and recovery and propose
  efficient solutions for them. The proposed solutions have been implemente
 d on MVAPICH2, a popular MPI and PGAS runtime used by scientists and HPC c
 lusters around the world.
URL:https://sc18.supercomputing.org/presentation/?id=drs124&sess=sess342
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