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DTSTAMP:20181221T160905Z
LOCATION:C2/3/4 Ballroom
DTSTART;TZID=America/Chicago:20181114T083000
DTEND;TZID=America/Chicago:20181114T170000
UID:submissions.supercomputing.org_SC18_sess323_post230@linklings.com
SUMMARY:VeloC: Very Low Overhead Checkpointing System
DESCRIPTION:Poster\nTech Program Reg Pass, Exhibits Reg Pass\n\nVeloC: Ver
 y Low Overhead Checkpointing System\n\nNicolae, Cappello, Moody, Gonsiorow
 ski, Mohror\n\nCheckpointing large amounts of related data concurrently to
  stable storage is a common I/O pattern of many HPC applications. However,
  such a pattern frequently leads to I/O bottlenecks that lead to poor scal
 ability and performance. As modern HPC infrastructures continue to evolve,
  there is a growing gap between compute capacity vs. I/O capabilities. Fur
 thermore, the storage hierarchy is becoming increasingly heterogeneous: in
  addition to parallel file systems, it comprises burst buffers, key-value 
 stores, deep memory hierarchies at node level, etc. In this context, state
  of art is insufficient to deal with the diversity of vendor APIs, perform
 ance and persistency characteristics. This poster proposes VeloC, a low-ov
 erhead checkpointing system specifically designed to address the checkpoin
 ting needs of future exascale HPC systems. VeloC offers a simple API at us
 er level, while employing an advanced multi-level resilience strategy that
  transparently optimizes the performance and scalability of checkpointing 
 by leveraging heterogeneous storage.
URL:https://sc18.supercomputing.org/presentation/?id=post230&sess=sess323
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