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DTSTAMP:20181221T160726Z
LOCATION:D167/174
DTSTART;TZID=America/Chicago:20181111T114000
DTEND;TZID=America/Chicago:20181111T120500
UID:submissions.supercomputing.org_SC18_sess170_pec430@linklings.com
SUMMARY:Accelerating Intelligence
DESCRIPTION:Workshop\nAccelerators, Heterogeneous Systems, NVRAM, Workshop
  Reg Pass\n\nAccelerating Intelligence\n\nDavis\n\nMassive amounts of data
  are being consumed and processed to drive business. The exponential incre
 ase in data has not been matched by the computational power of processors.
  This has led to the rise of accelerators. However, big data algorithms fo
 r ETL, ML, AI, and DL are evolving rapidly and/or have significant diversi
 ty. These moving targets are poor candidates for ASICs, but match the capa
 bilities and flexibility of FPGAs. Furthermore, FPGAs provide a platform t
 o move computation to the data, away from the CPU, by providing computatio
 n at line rate at the network and/or storage. Bigstream is bridging the ga
 p between high-level big data frameworks and accelerators using our Hyper-
 acceleration Layer built on top of SDAccel. In this talk, we will describe
  the Bigstream Hyper-acceleration that automatically provides computationa
 l acceleration, by the CPU, storage, or network, for big data platforms wi
 th zero code change.
URL:https://sc18.supercomputing.org/presentation/?id=pec430&sess=sess170
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