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DTSTAMP:20181221T160726Z
LOCATION:D220
DTSTART;TZID=America/Chicago:20181111T143300
DTEND;TZID=America/Chicago:20181111T143600
UID:submissions.supercomputing.org_SC18_sess160_ws_whpc124@linklings.com
SUMMARY:Power Aware Heterogeneous Node Assembly
DESCRIPTION:Workshop\nDiversity, Education, Hot Topics, Workshop Reg Pass\
 n\nPower Aware Heterogeneous Node Assembly\n\nAcun\n\nTo meet ever increas
 ing computational requirements, supercomputers and data centers are beginn
 ing to utilize fat compute nodes with multiple hardware components such as
  manycore CPUs and accelerators. These components have intrinsic power var
 iations even among same model components from same manufacturer. In this p
 aper, we argue that node assembly techniques that consider these intrinsic
  power variations can achieve better power efficiency without any performa
 nce trade off on large scale supercomputing facilities and data centers. W
 e propose three different node assembly techniques: (1) Sorted Assembly, (
 2) Balanced Power Assembly, and (3) Application-Aware Assembly. In Sorted 
 Assembly, node components are categorized (or sorted) into groups accordin
 g to their power efficiency, and components from the same group are assemb
 led into a node. In Balanced Power Assembly, components are assembled to m
 inimize node-to-node power variations. In Application-Aware Assembly, the 
 most heavily used components by the application are selected based on the 
 highest power efficiency. We evaluate the effectiveness and cost savings o
 f the three techniques compared to the standard random assembly under diff
 erent node counts and variability scenarios.
URL:https://sc18.supercomputing.org/presentation/?id=ws_whpc124&sess=sess1
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