Performance Evaluation of a Vector Supercomputer SX-Aurora TSUBASA

Authors: Kazuhiko Komatsu (Tohoku University), Shintaro Momose (Tohoku University, NEC Corporation), Yoko Isobe (Tohoku University, NEC Corporation), Osamu Watanabe (Tohoku University, NEC Corporation), Akihiro Musa (Tohoku University, NEC Corporation), Mitsuo Yokokawa (Kobe University), Toshikazu Aoyama (NEC Corporation), Masayuki Sato (Tohoku University), Hiroaki Kobayashi (Tohoku University)

Abstract: A new SX-Aurora TSUBASA vector supercomputer has been released with a new system architecture and a new execution model to achieve high sustained performance, especially for memory-intensive applications. In SX-Aurora TSUBASA, the vector host (VH) of a standard x86 Linux node is attached to the vector engine (VE) of a newly developed vector processor. An application is executed on the VE, and only system calls are offloaded to the VH. This new execution model can avoid redundant data transfers between a VH and a VE that can easily become a bottleneck in the conventional execution model. This paper examines the potential of SX-Aurora TSUBASA. First, the basic performance of SX-Aurora TSUBASA is clarified by evaluating benchmark programs. Then, the effectiveness of the new execution model is examined by using a microbenchmark. Finally, the high potential of SX-Aurora TSUBASA is clarified through evaluations of practical applications.


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